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19-2675; Rev 1; 1/03
16-Bit, 135ksps, Single-Supply ADCs with Bipolar Analog Input Range
General Description
The MAX1179/MAX1187/MAX1189 16-bit, low-power, successive-approximation analog-to-digital converters (ADCs) feature automatic power-down, a factorytrimmed internal clock, and a 16-bit wide parallel interface. The devices operate from a single +4.75V to +5.25V analog supply and feature a separate digital supply input for direct interface with +2.7V to +5.25V digital logic. The MAX1179 accepts a bipolar input voltage range of 5V. The MAX1187 accepts an analog input voltage range from 0 to +10V, while the MAX1189 accepts a bipolar analog input voltage range of 10V. All devices consume only 23mW at a sampling rate of 135ksps when using an external reference and 29mW when using the internal +4.096V reference. AutoShutdownTM reduces supply current to 0.4mA at 10ksps. The MAX1179/MAX1187/MAX1189 are ideal for high-performance, battery-powered data-acquisition applications. Excellent AC performance (THD = -100dB) and DC accuracy (2LSB INL) make the MAX1179/MAX1187/ MAX1189 ideal for industrial process control, instrumentation, and medical applications. The MAX1179/MAX1187/MAX1189 are available in a 28-pin TSSOP package and are fully specified over the -40C to +85C extended temperature range and the 0C to +70C commercial temperature range. o 16-Bit Wide Parallel Interface o Single +4.75V to +5.25V Analog Supply Voltage o Interfaces with +2.7V to +5.25V Digital Logic o 2LSB INL (max) o 1LSB DNL (max) o Low Supply Current (MAX1189) 5.3mA (External Reference) 6.2mA (Internal Reference) 5A AutoShutdown Mode o Small Footprint 28-Pin TSSOP Package
Features
o Analog Input Voltage Range: 10V, 5V, or 0 to 10V
MAX1179/MAX1187/MAX1189
Pin Configuration
TOP VIEW
D8 1 D9 2 D10 3 D11 4 D12 5 D13 6 28 D7 27 D6 26 D5 25 D4 24 D3
Applications
Temperature Sensing and Monitoring Industrial Process Control I/O Modules Data-Acquisition Systems Precision Instrumentation
D14 7 D15 8 R/C 9 EOC 10 AVDD 11 AGND 12 AIN 13 AGND 14
MAX1179 MAX1187 MAX1189
23 D2 22 D1 21 D0 20 DVDD 19 DGND 18 CS 17 RESET 16 REF 15 REFADJ
TSSOP
AutoShutdown is a trademark of Maxim Integrated Products, Inc.
Ordering Information
PART MAX1179ACUI MAX1179BCUI TEMP RANGE 0C to +70C 0C to +70C PIN-PACKAGE 28 TSSOP 28 TSSOP INPUT VOLTAGE RANGE 5V 5V INL (LSB) 2 2
Ordering Information continued at end of data sheet.
________________________________________________________________ Maxim Integrated Products
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For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim's website at www.maxim-ic.com.
16-Bit, 135ksps, Single-Supply ADCs with Bipolar Analog Input Range MAX1179/MAX1187/MAX1189
ABSOLUTE MAXIMUM RATINGS
AVDD to AGND .........................................................-0.3V to +6V DVDD to DGND.........................................................-0.3V to +6V AGND to DGND.....................................................-0.3V to +0.3V AIN to AGND .....................................................-16.5V to +16.5V REF, REFADJ to AGND............................-0.3V to (AVDD + 0.3V) CS, R/C, RESET to DGND ........................................-0.3V to +6V D_, EOC to DGND ...................................-0.3V to (DVDD + 0.3V) Maximum Continuous Current Into Any Pin ........................50mA Continuous Power Dissipation (TA = +70C) 28-Pin TSSOP (derate 12.8mW/C above +70C) .....1026mW Operating Temperature Range MAX11_ _ _CUI ...................................................0C to +70C MAX11_ _ _EUI ................................................-40C to +85C Storage Temperature Range .............................-65C to +150C Junction Temperature ......................................................+150C Lead Temperature (soldering, 10s) .................................+300C
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(AVDD = DVDD = +5V 5%, external reference = +4.096V, CREF = 10F, CREFADJ = 0.1F, VREFADJ = AVDD, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25C.)
PARAMETER DC ACCURACY Resolution Differential Nonlinearity RES MAX11_ _A DNL No missing codes over temperature MAX11_ _A Integral Nonlinearity INL MAX11_ _B MAX11_ _C Transition Noise Offset Error Gain Error Offset Drift Gain Drift AC ACCURACY (fIN = 1kHz, VAIN = full range, 135ksps) Signal-to-Noise Plus Distortion Signal-to-Noise Ratio Total Harmonic Distortion Spurious-Free Dynamic Range ANALOG INPUT MAX1179 Input Range VAIN MAX1187 MAX1189 MAX1179/MAX1187 MAX1179 Input Resistance RAIN MAX1177 MAX1189 Normal operation Shutdown mode Shutdown mode Normal operation Shutdown mode -5 0 -10 5.3 3 5.3 7.8 6 10 13.0 k 6.9 +5 +10 +10 9.2 V SINAD SNR THD SFDR 92 86 87 90 91 -100 103 -92 dB dB dB dB RMS noise, external reference Internal reference -10 MAX11_ _B MAX11_ _C 16 -1 -1.0 -1 -2 -2 -4 0.6 0.75 0 0 16 1 +10 0.2 +1 +1.5 +2 +2 +2 +4 LSBRMS mV %FSR V/C ppm/C LSB LSB Bits SYMBOL CONDITIONS MIN TYP MAX UNITS
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16-Bit, 135ksps, Single-Supply ADCs with Bipolar Analog Input Range
ELECTRICAL CHARACTERISTICS (continued)
(AVDD = DVDD = +5V 5%, external reference = +4.096V, CREF = 10F, CREFADJ = 0.1F, VREFADJ = AVDD, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25C.)
PARAMETER SYMBOL CONDITIONS MAX1179, -5V VAIN +5V Input Current IAIN MAX1187, 0 VAIN +10V MAX1189, -10V VAIN +10V Normal operation Shutdown mode Normal/shutdown mode Normal operation Shutdown mode MIN -1.8 -1.8 -0.1 -1.8 -1.8 1 0.5 10 4.056 4.096 35 IREF-(SC) 10 4.136 TYP MAX +0.4 +1.8 +2.0 +1.2 +1.8 1.4 mA MAX1189, VAIN = +10V, shutdown mode to operating mode 0.7 pF V ppm/C mA mA UNITS
MAX1179/MAX1187/MAX1189
MAX1179, VAIN = +5V, shutdown mode to operating mode Input Current Step at Power-Up IPU
Input Capacitance INTERNAL REFERENCE REF Output Voltage REF Output Tempco REF Short-Circuit Current EXTERNAL REFERENCE REF and REFADJ Input Voltage Range REFADJ Buffer Disable Threshold REF Input Current REFADJ Input Current DIGITAL INPUTS/OUTPUTS Output High Voltage Output Low Voltage Input High Voltage Input Low Voltage Input Leakage Current Input Hysteresis Input Capacitance Three-State Output Leakage Three-State Output Capacitance
CIN VREF
3.8 AVDD 0.4 IREF IREFADJ Normal mode, fSAMPLE = 135ksps Shutdown mode (Note 1) REFADJ = AVDD ISOURCE = 0.5mA, DVDD = +2.7V to +5.25V, DVDD AVDD = +5.25V 0.4 ISINK = 1.6mA, DVDD = +2.7V to +5.25V, AVDD = +5.25V 0.7 x DVDD 60 0.1 16
4.2 AVDD 0.1 100 10
V V A A
VOH VOL VIH VIL
V 0.4 V V 0.3 x DVDD V A V pF 10 15 A pF
Digital input = DVDD or 0V VHYST CIN IOZ COZ
-1 0.2 15
+1
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16-Bit, 135ksps, Single-Supply ADCs with Bipolar Analog Input Range MAX1179/MAX1187/MAX1189
ELECTRICAL CHARACTERISTICS (continued)
(AVDD = DVDD = +5V 5%, external reference = +4.096V, CREF = 10F, CREFADJ = 0.1F, VREFADJ = AVDD, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25C.)
PARAMETER POWER SUPPLIES Analog Supply Voltage Digital Supply Voltage AVDD DVDD External reference, 135ksps Analog Supply Current IAVDD Internal reference, 135ksps MAX1187 MAX1179/MAX1189 MAX1187 MAX1179/MAX1189 5.2 0.5 3.7 0.75 AVDD = DVDD = +4.75V to +5.25V 3.5 4.0 4.75 2.70 5.25 5.25 2.9 5.3 3.8 6.2 5 A mA mA LSB mA V V SYMBOL CONDITIONS MIN TYP MAX UNITS
Shutdown Supply Current Digital Supply Current Power-Supply Rejection
ISHDN IDVDD
Shutdown mode, IAVDD + IDVDD (Note 1), digital input = DVDD or 0V Standby mode
TIMING CHARACTERISTICS (Figures 1 and 2)
(AVDD = +5V 5V, DVDD = +2.7V to AVDD, external reference = +4.096V, CREF = 10F, CREFADJ = 0.1F, VREFADJ = AVDD, CLOAD = 20pF, TA = TMIN to TMAX.)
PARAMETER Maximum Sampling Rate Acquisition Time Conversion Time CS Pulse Width High CS Pulse Width Low R/C to CS Fall Setup Time R/C to CS Fall Hold Time CS to Output Data Valid EOC Fall to CS Fall CS Rise to EOC Rise Bus Relinquish Time SYMBOL fSAMPLE(MAX) tACQ tCONV tCSH tCSL tDS tDH tDO tDV tEOC tBR DVDD = +4.75V to +5.25V DVDD = +2.7V to +5.25V DVDD = +4.75V to +5.25V DVDD = +2.7V to +5.25V DVDD = +4.75V to +5.25V DVDD = +2.7V to +5.25V DVDD = +4.75V to +5.25V DVDD = +2.7V to +5.25V 0 40 80 40 80 (Note 2) (Note 2) DVDD = +4.75V to +5.25V DVDD = +2.7V to +5.25V 40 40 60 0 40 60 40 80 2 4.7 CONDITIONS MIN TYP MAX 135 UNITS ksps s s ns ns ns ns ns ns ns ns
Note 1: Maximum specification is limited by automated test equipment. Note 2: To ensure best performance, finish reading the data and wait tBR before starting a new acquisition.
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16-Bit, 135ksps, Single-Supply ADCs with Bipolar Analog Input Range MAX1179/MAX1187/MAX1189
Typical Operating Characteristics
(AVDD = DVDD = +5V, external reference = +4.096V, CREF = 10F, CREFADJ = 0.1F, VREFADJ = AVDD, CLOAD = 20pF, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25C.) (Typical Application Circuit)
INL vs. CODE
MAX1179/87/89 toc01
DNL vs. CODE
2.0 1.5 1.0 DNL (LSB) 0.5 0 -0.5 -1.0 -1.5 -2.0 -2.5 4.45 4.40 0 10000 20000 30000 40000 50000 60000 CODE -40
MAX1179/87/89 toc02
SUPPLY CURRENT (AVDD + DVDD) vs. TEMPERATURE
4.75 SUPPLY CURRENT (mA) 4.70 4.65 4.60 4.55 4.50 fSAMPLE = 135ksps SHUTDOWN MODE BETWEEN CONVERSIONS -20 0 20 40 60 80 4.75V 5.0V
MAX1179/87/89 toc03
2.5 2.0 1.5 1.0 INL (LSB) 0.5 0 -0.5 -1.0 -1.5 -2.0 -2.5 0 10000 20000 30000 40000 50000 60000 CODE
2.5
4.80 5.25V
TEMPERATURE (C)
SUPPLY CURRENT (AVDD + DVDD) vs. SAMPLE RATE
MAX1179/87/89 toc04
SHUTDOWN CURRENT (AVDD + DVDD) vs. TEMPERATURE
MAX1179/87/89 toc05
OFFSET ERROR vs. TEMPERATURE
8 6 OFFSET ERROR (mV) 4 2 0 -2 -4 -6 -8 -10 MAX1189
MAX1179/87/89 toc06
10 STANDBY MODE
5.0 SHUTDOWN SUPPLY CURRENT (A) 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5
NO CONVERSIONS
10
1 SUPPLY CURRENT (mA)
0.1 SHUTDOWN MODE 0.01
0.001
0.0001 0.01 0.1 1 10 100 1000 SAMPLE RATE (ksps)
0 -40 -20 0 20 40 60 80 TEMPERATURE (C)
-40
-20
0
20
40
60
80
TEMPERATURE (C)
GAIN ERROR vs. TEMPERATURE
MAX1179/87/89 toc07
INTERNAL REFERENCE vs. TEMPERATURE
MAX1179/87/89 toc08
FFT AT 1kHz
fSAMPLE = 135ksps -20 -40 MAGNITUDE (dB) -60 -80 -100 -120 -140 -160 -180
MAX 1179/87/89 toc09
0.20 0.15 GAIN ERROR (%FSR) 0.10 0.05 0 -0.05 -0.10 -0.15 -0.20 -40 -20 0 20 40 60 80 TEMPERATURE (C)
4.136 4.126 INTERNAL REFERENCE (V) 4.116 4.106 4.096 4.086 4.076 4.066 4.056 -40 -20 0 20 40 60 80 TEMPERATURE (C)
0
0
20
40
60
FREQUENCY (kHz)
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16-Bit, 135ksps, Single-Supply ADCs with Bipolar Analog Input Range MAX1179/MAX1187/MAX1189
Typical Operating Characteristics (continued)
(AVDD = DVDD = +5V, external reference = +4.096V, CREF = 10F, CREFADJ = 0.1F, VREFADJ = AVDD, CLOAD = 20pF, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25C.) (Typical Application Circuit)
SINAD vs. FREQUENCY
MAX1179/87/89 toc10
SPURIOUS-FREE DYNAMIC RANGE vs. FREQUENCY
MAX1179/87/89 toc11
TOTAL HARMONIC DISTORTION vs. FREQUENCY
-10 -20 -30 THD (dB) -40 -50 -60 -70 -80 -90 -100 -110
MAX1179/87/89 toc12
100 90 80 70 SINAD (dB) 60 50 40 30 20 10 0 1 10 FREQUENCY (kHz) fSAMPLE = 131ksps
120 100 80 SFDR (dB) 60 40 20 0
0
100
1
10 FREQUENCY (kHz)
100
1
10 FREQUENCY (kHz)
100
Pin Description
PIN 1 2 3 4 5 6 7 8 NAME D8 D9 D10 D11 D12 D13 D14 D15 Three-State Digital Data Output Three-State Digital Data Output Three-State Digital Data Output Three-State Digital Data Output Three-State Digital Data Output Three-State Digital Data Output Three-State Digital Data Output Three-State Digital Data Output (MSB) Read/Convert Input. Power up and place the MAX1179/MAX1187/MAX1189 in acquisition mode by holding R/C low during the first falling edge of CS. During the second falling edge of CS, the level on R/C determines whether the reference and reference buffer power down or remain on after conversion. Set R/C high during the second falling edge of CS to power down the reference and buffer, or set R/C low to leave the reference and buffer powered up. Set R/C high during the third falling edge of CS to put valid data on the bus. End of Conversion. EOC drives low when conversion is complete. Analog Supply Input. Bypass with a 0.1F capacitor to AGND. Analog Ground. Primary analog ground (star ground). Analog Input Analog Ground. Connect pin 14 to pin 12. FUNCTION
9
R/C
10 11 12 13 14
EOC AVDD AGND AIN AGND
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16-Bit, 135ksps, Single-Supply ADCs with Bipolar Analog Input Range
Pin Description (continued)
PIN 15 16 17 18 19 20 21 22 23 24 25 26 27 28 NAME REFADJ REF RESET CS DGND DVDD D0 D1 D2 D3 D4 D5 D6 D7 FUNCTION Reference Buffer Output. Bypass REFADJ with a 0.1F capacitor to AGND for internal reference mode. Connect REFADJ to AVDD to select external reference mode. Reference Input/Output. Bypass REF with a 10F capacitor to AGND. REF is the external reference input when in external reference mode. Reset Input. Logic high resets the device. Convert Start. The first falling edge of CS powers up the device and enables acquisition when R/C is low. The second falling edge of CS starts conversion. The third falling edge of CS loads the result onto the bus when R/C is high. Digital Ground Digital Supply Voltage. Bypass with a 0.1F capacitor to DGND. Three-State Digital Data Output (LSB) Three-State Digital Data Output Three-State Digital Data Output Three-State Digital Data Output Three-State Digital Data Output Three-State Digital Data Output Three-State Digital Data Output Three-State Digital Data Output
MAX1179/MAX1187/MAX1189
Detailed Description
Converter Operation
The MAX1179/MAX1187/MAX1189 use a successiveapproximation (SAR) conversion technique with an inherent track-and-hold (T/H) stage to convert an analog input into a 16-bit digital output. Parallel outputs provide a high-speed interface to microprocessors (Ps). The Functional Diagram at the end of the data sheet shows a simplified internal architecture of the MAX1179/MAX1187/MAX1189. Figure 3 shows a typical application circuit for the MAX1179/MAX1187/MAX1189.
1mA D0-D15 CLOAD = 20pF 1mA DGND
A)
DVDD
D0-D15 CLOAD = 20pF DGND
Analog Input
Input Scaler The MAX1179/MAX1187/MAX1189 have an input scaler which allows conversion of true bipolar input voltages and input voltages greater than the power supply, while operating from a single +5V analog supply. The input scaler attenuates and shifts the analog input to match the input range of the internal DAC. The MAX1179 input voltage range is 5V, while the MAX1189 input voltage
HIGH-Z TO VOH, VOL TO VOH, AND VOH TO HIGH-Z
B)
HIGH-Z TO VOL, VOH TO VOL, AND VOL TO HIGH-Z
Figure 1. Load Circuits
range is 10V. The MAX1187 has a unipolar input voltage range of 0 to +10V. Figure 4 shows the equivalent input circuit of the MAX1179/MAX1187/MAX1189. This circuit limits the current going into or out of AIN to less than 1.8mA.
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16-Bit, 135ksps, Single-Supply ADCs with Bipolar Analog Input Range MAX1179/MAX1187/MAX1189
tCSL CS tACQ R/C tDH EOC HIGH-Z D0-D15 tCONV tDO
DATA VALID
tCSH
REF POWERDOWN CONTROL tDS tDV
tEOC
tBR
HIGH-Z
Figure 2. MAX1179/MAX1187/MAX1189 Timing Diagram
Power-Down Modes
+5V ANALOG 0.1F +5V DIGITAL 0.1F P DATA BUS 16-BIT WIDE
AVDD ANALOG INPUT AIN
DVDD D0-D15
Select standby mode or shutdown mode with R/C during the second falling edge of CS (see Selecting Standby or Shutdown Mode section). The MAX1179/MAX1187/ MAX1189 automatically enter either standby mode (reference and buffer on) or shutdown (reference and buffer off) after each conversion depending on the status of R/C during the second falling edge of CS.
R/C CS RESET
MAX1179 MAX1187 MAX1189
Internal Clock
EOC REF REFADJ
The MAX1179/MAX1187/MAX1189 generate an internal conversion clock to free the microprocessor from the burden of running the SAR conversion clock. Total conversion time after entering hold mode (second falling edge of CS) to end-of-conversion (EOC) falling is 4.7s (max).
0.1F 10F
AGND DGND
Applications Information
Starting a Conversion
CS and R/C control acquisition and conversion in the MAX1179/MAX1187/MAX1189 (see Figure 2). The first falling edge of CS powers up the device and puts it in acquire mode if R/C is low. The convert start (CS) is ignored if R/C is high. The MAX1179/MAX1187/ MAX1189 need at least 12ms (CREFADJ = 0.1F, CREF = 10F) for the internal reference to wake up and settle before starting the conversion, if powering up from shutdown. Reset the MAX1179/MAX1187/ MAX1189 by toggling RESET with CS high. The next falling edge of CS begins acquisition.
Figure 3. Typical Application Circuit for the MAX1179/MAX1187/ MAX1189
Track and Hold (T/H) In track mode, the internal hold capacitor acquires the analog signal (see Figure 4). In hold mode, the T/H switches open and the capacitive DAC samples the analog input. During the acquisition, the analog input (AIN) charges capacitor CHOLD. The acquisition ends on the second falling edge of CS. At this instant, the T/H switches open. The retained charge on CHOLD represents a sample of the input. In hold mode, the capacitive DAC adjusts during the remainder of the conversion time to restore node T/H OUT to zero within the limits of a 16-bit resolution. Force CS low to put valid data on the bus after conversion is complete.
Selecting Standby or Shutdown Mode
The MAX1179/MAX1187/MAX1189 have a selectable standby or low-power shutdown mode. In standby mode, the ADC's internal reference and reference buffer do not power down between conversions, eliminating the need to wait for the reference to power up before performing the next conversion. Shutdown mode powers down the reference and reference buffer after
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16-Bit, 135ksps, Single-Supply ADCs with Bipolar Analog Input Range MAX1179/MAX1187/MAX1189
REF MAX1187 3.4k R2 AIN R3 161 TRACK S1 HOLD CHOLD 30pF T/H OUT TRACK HOLD S2 R3 S3 POWERDOWN R2 AIN 161 MAX1179/MAX1189 3.4k TRACK S1 CHOLD 30pF T/H OUT HOLD S2
HOLD TRACK
S1, S2 = T/H SWITCH S3 = POWER-DOWN (MAX1179/MAX1189 ONLY)
R2 = 7.85k (MAX1189) OR 3.92k (MAX1179/MAX1187) R3 = 5.45k (MAX1189) OR 17.79k (MAX1179/MAX1187)
Figure 4. Equivalent Input Circuit
DATA OUT
ACQUISITION
CONVERSION
CS
R/C
EOC REF AND BUFFER POWER
Figure 5. Selecting Standby Mode
completing a conversion. The reference and reference buffer require a minimum of 12ms (CREFADJ = 0.1F, CREF = 10F) to power up and settle from shutdown. The state of R/C during the second falling edge of CS selects which power-down mode the MAX1179/ MAX1187/MAX1189 enters upon conversion completion. Holding R/C low causes the MAX1179/MAX1187/ MAX1189 to enter standby mode. The reference and buffer are left on after the conversion completes. R/C high causes the MAX1179/MAX1187/MAX1189 to enter shutdown mode and power down the reference and
buffer after conversion (see Figures 5 and 6). Set the voltage at REF high during the second falling edge of CS to realize the lowest current operation. Standby Mode While in standby mode, the supply current is less than 3.7mA (typ). The next falling edge of CS with R/C low causes the MAX1179/MAX1187/MAX1189 to exit standby mode and begin acquisition. The reference and reference buffer remain active to allow quick turn-on time.
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16-Bit, 135ksps, Single-Supply ADCs with Bipolar Analog Input Range MAX1179/MAX1187/MAX1189
ACQUISITION CONVERSION DATA OUT
CS
R/C
EOC REF & BUFFER POWER
Figure 6. Selecting Shutdown Mode
+5V 68k
MAX1179 MAX1187 MAX1189 REFADJ 0.1F
100k
150k
Figure 7. MAX1179/MAX1187/MAX1189 Reference Adjust Circuit
External Reference An external reference can be placed at either the input (REFADJ) or the output (REF) of the MAX1179/ MAX1187/MAX1189's internal buffer amplifier. Using the buffered REFADJ input makes buffering the external reference unnecessary. The input impedance of REFADJ is typically 5k. The internal buffer output must be bypassed at REF with a 10F capacitor. Connect REFADJ to AVDD to disable the internal buffer. Directly drive REF using an external 3.8V to 4.2V reference. During conversion, the external reference must be able to drive 100A of DC load current and have an output impedance of 10 or less. For optimal performance, buffer the reference through an op amp and bypass REF with a 10F capacitor. Consider the MAX1179/MAX1187/MAX1189's equivalent input noise (0.6LSB) when choosing a reference.
Shutdown Mode In shutdown mode, the reference and reference buffer shut down between conversions. Shutdown mode reduces supply current to 0.5A (typ) immediately after the conversion. The next falling edge of CS with R/C low causes the reference and buffer to wake up and enter acquisition mode. To achieve 16-bit accuracy, allow 12ms (CREFADJ = 0.1F, CREF = 10F) for the internal reference to wake up.
Reading the Conversion Result
EOC flags the microprocessor when a conversion is complete. The falling edge of EOC signals that the data is valid and ready to be output to the bus. D0-D15 are the parallel outputs of the MAX1179/MAX1187/ MAX1189. These three-state outputs allow for direct connection to a microcontroller I/O bus. The outputs remain high-impedance during acquisition and conversion. Data is loaded onto the bus with the third falling edge of CS with R/C high (after tDO). Bringing CS high forces the output bus back to high impedance. The MAX1179/MAX1187/MAX1189 then wait for the next falling edge of CS to start the next conversion cycle (see Figure 2).
Internal and External Reference
Internal Reference The internal reference of the MAX1179/MAX1187/ MAX1189 is internally buffered to provide +4.096V output at REF. Bypass REF to AGND and REFADJ to AGND with 10F and 0.1F, respectively. Sink or source current at REFADJ to make fine adjustments to the internal reference. The input impedance of REFADJ is nominally 5k. Use the circuit of Figure 7 to adjust the internal reference to 1.5%.
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16-Bit, 135ksps, Single-Supply ADCs with Bipolar Analog Input Range MAX1179/MAX1187/MAX1189
OUTPUT CODE
11 . . . 1111 11 . . . 1110 11 . . . 1101 10 . . . 0001 10 . . . 0000 01 . . . 1111 00 . . . 0011 00 . . . 0010 00 . . . 0001 00 . . . 0000 -32768 -32766 -32767 -32765
INPUT RANGE = -5V TO +5V
FULL-SCALE TRANSITION
OUTPUT CODE
11 . . . 111 11 . . . 110 11 . . . 101
INPUT RANGE = 0 TO +10V
FULL-SCALE TRANSITION
FULL-SCALE RANGE (FSR) = +10V 1LSB = FSR x VREF 65536 x 4.096
FULL-SCALE RANGE (FSR) = +10V 1LSB = 00 . . . 011 00 . . . 010 00 . . . 001 00 . . . 000 FSR x VREF 65536 x 4.096
-1
0
+1
+32766 +32768 +32767
0
1
2
3
65534 65536 65535 INPUT VOLTAGE (LSB)
INPUT VOLTAGE (LSB)
Figure 8. MAX1179 Transfer Function
Figure 9. MAX1187 Transfer Function
OUTPUT CODE
11 . . . 1111 11 . . . 1110 11 . . . 1101 10 . . . 0001 10 . . . 0000 01 . . . 1111 00 . . . 0011 00 . . . 0010 00 . . . 0001 00 . . . 0000 -32768 -32766 -32767 -32765
INPUT RANGE = -10V TO +10V
FULL-SCALE TRANSITION
FULL-SCALE RANGE (FSR) = +20V 1LSB = FSR x VREF 65536 x 4.096
-1
0
+1
+32766 +32768 +32767
INPUT VOLTAGE (LSB)
Figure 10. MAX1189 Transfer Function
Transfer Function
Figures 8, 9, and 10 show the MAX1179/MAX1187/ MAX1189's output transfer functions. The MAX1179 and MAX1189 outputs are coded in offset binary, while the MAX1187 is coded in standard binary.
step-change in input signal. The input amplifier must have a high enough slew rate to complete the required output voltage change before the beginning of the acquisition time. Figure 11 shows an example of this circuit using the MAX427. Figures 12a and 12b show how the MAX1179 and MAX1189 analog input current varies depending on whether the chip is operating or powered down. The part is fully powered down between conversions if the voltage at R/C is set high during the second falling edge of CS. The input current abruptly steps to the powered up value at the start of acquisition. This step in the input current can disrupt the ADC input, depending on the driving circuit's output impedance at high frequencies. If the driving circuit cannot fully settle by the end of acquisition time, the accuracy of the system can be compromised. To avoid this situation, increase the acquisition time, use a driving circuit that can settle within tACQ, or leave the MAX1179/MAX1189 powered up by setting the voltage at R/C low during the second falling edge of CS.
Layout, Grounding, and Bypassing
For best performance, use printed circuit (PC) boards. Do not run analog and digital lines parallel to each other, and do not lay out digital signal paths underneath the ADC package. Use separate analog and digital ground planes with only one point connecting the two ground systems (analog and digital) as close to the device as possible. Route digital signals far away from sensitive analog and reference inputs. If digital lines must cross analog lines, do so at right angles to minimize coupling digital noise
11
Input Buffer
Most applications require an input buffer amplifier to achieve 16-bit accuracy and prevent loading the source. Switch the channels immediately after acquisition, rather than near the end of or after a conversion when the input signal is multiplexed. This allows more time for the input buffer amplifier to respond to a large
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16-Bit, 135ksps, Single-Supply ADCs with Bipolar Analog Input Range MAX1179/MAX1187/MAX1189
Definitions
REF
Integral Nonlinearity
**
MAX1179 MAX1187 MAX1189
MAX427
ANALOG INPUT *MAX1187 ONLY. **MAX1179/MAX1189 ONLY.
AIN
*
Integral nonlinearity (INL) is the deviation of the values on an actual transfer function from a straight line. This straight line can be either a best-straight-line fit or a line drawn between the end points of the transfer function, once offset and gain errors have been nullified. The static linearity parameters for the MAX1179/MAX1187/ MAX1189 are measured using the endpoint method.
Differential Nonlinearity
Differential nonlinearity (DNL) is the difference between an actual step-width and the ideal value of 1LSB. A DNL error specification of 1LSB guarantees no missing codes and a monotonic transfer function.
Figure 11. MAX1179/MAX1187/MAX1189 Fast-Settling Input Buffer
Signal-to-Noise Ratio
For a waveform perfectly reconstructed from digital samples, signal-to-noise ratio (SNR) is the ratio of the full-scale analog input (RMS value) to the RMS quantization error (residual error). The ideal, theoretical minimum analog-to-digital noise is caused by quantization noise error only and results directly from the ADC's resolution (N bits): SNR = ((6.02 N) + 1.76)dB where N = 16 bits. In reality, there are other noise sources besides quantization noise: thermal noise, reference noise, clock jitter,
onto the analog lines. If the analog and digital sections share the same supply, isolate the digital and analog supply by connecting them with a low value (10) resistor or ferrite bead. The ADC is sensitive to high-frequency noise on the AV DD supply. Bypass AV DD to AGND with a 0.1F capacitor in parallel with a 1F to 10F low-ESR capacitor with the smallest capacitor closest to the device. Keep capacitor leads short to minimize stray inductance.
MAX1179 ANALOG INPUT CURRENT vs. ANALOG INPUT VOLTAGE
2.0 1.5 ANALOG INPUT CURRENT (mA) 1.0 0.5 SHUTDOWN MODE 0 -0.5 -1.0 -1.5 -2.0 -5.0 -2.5 0 2.5 5.0 ANALOG INPUT VOLTAGE (V) STANDBY MODE ANALOG INPUT CURRENT (mA) 1.5 1.0 0.5
MAX1189 ANALOG INPUT CURRENT vs. ANALOG INPUT VOLTAGE
SHUTDOWN MODE 0 STANDBY MODE -0.5 -1.0 -1.5 -10 -5 0 5 10 ANALOG INPUT VOLTAGE (V)
Figure 12a. MAX1179 Analog Input Current
Figure 12b. MAX1189 Analog Input Current
12
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16-Bit, 135ksps, Single-Supply ADCs with Bipolar Analog Input Range
etc. SNR is computed by taking the ratio of the RMS signal to the RMS noise, which includes all spectral components minus the fundamental, the first five harmonics, and the DC offset.
Total Harmonic Distortion
Total harmonic distortion (THD) is the ratio of the RMS sum of the first five harmonics of the input signal to the fundamental itself. This is expressed as: 2 2 2 2 V2 + V3 + V4 + V5 THD = 20 x log V1 where V1 is the fundamental amplitude and V2 through V5 are the 2nd- through 5th-order harmonics.
MAX1179/MAX1187/MAX1189
Signal-to-Noise Plus Distortion
Signal-to-noise plus distortion (SINAD) is the ratio of the fundamental input frequency's RMS amplitude to the RMS equivalent of all the other ADC output signals. SignalRMS SINAD(db) = 20 x log (Noise + Distortion)RMS
Effective Number of Bits
Effective number of bits (ENOB) indicates the global accuracy of an ADC at a specific input frequency and sampling rate. An ideal ADC's error consists of quantization noise only. With an input range equal to the fullscale range of the ADC, calculate the effective number of bits as follows: SINAD - 1.76 ENOB = 6.02
Spurious-Free Dynamic Range
Spurious-free dynamic range (SFDR) is the ratio of the RMS amplitude of the fundamental (maximum signal component) to the RMS value of the next largest frequency component.
Chip Information
TRANSISTOR COUNT: 15,383 PROCESS: BiCMOS
Ordering Information (continued)
PART MAX1179CCUI MAX1179AEUI MAX1179BEUI MAX1179CEUI MAX1187ACUI MAX1187BCUI MAX1187CCUI MAX1187AEUI MAX1187BEUI MAX1187CEUI MAX1189ACUI MAX1189BCUI MAX1189CCUI MAX1189AEUI* MAX1189BEUI* MAX1189CEUI* TEMP RANGE 0C to +70C -40C to +85C -40C to +85C -40C to +85C 0C to +70C 0C to +70C 0C to +70C -40C to +85C -40C to +85C -40C to +85C 0C to +70C 0C to +70C 0C to +70C -40C to +85C -40C to +85C -40C to +85C PIN-PACKAGE 28 TSSOP 28 TSSOP 28 TSSOP 28 TSSOP 28 TSSOP 28 TSSOP 28 TSSOP 28 TSSOP 28 TSSOP 28 TSSOP 28 TSSOP 28 TSSOP 28 TSSOP 28 TSSOP 28 TSSOP 28 TSSOP INPUT VOLTAGE RANGE 5V 5V 5V 5V 0 to +10V 0 to +10V 0 to +10V 0 to +10V 0 to +10V 0 to +10V 10V 10V 10V 10V 10V 10V INL (LSB) 4 2 2 4 2 2 4 2 2 4 2 2 4 2 2 4
*Future product--contact factory for availability.
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13
16-Bit, 135ksps, Single-Supply ADCs with Bipolar Analog Input Range MAX1179/MAX1187/MAX1189
Functional Diagram
REFADJ 5k REFERENCE OUTPUT REGISTERS REF 16 BITS 16 BITS D0-D15 AVDD AGND DVDD DGND
AIN AGND RESET
INPUT SCALER
CAPACITIVE DAC
MAX1179 MAX1187 MAX1189
CLOCK CS R/C
SUCCESSIVEAPPROXIMATION REGISTER AND CONTROL LOGIC
EOC
14
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16-Bit, 135ksps, Single-Supply ADCs with Bipolar Analog Input Range
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/packages.)
TSSOP4.40mm.EPS
MAX1179/MAX1187/MAX1189
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 15 (c) 2003 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.

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